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| Author | SHA1 | Date |
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 Claudio Maggioni
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64f3d38dc9 | |
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Claudio Maggioni
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b99792f558 |
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@ -4,9 +4,8 @@
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\usepackage{float}
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\usepackage{subcaption}
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\usepackage{graphicx}
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\usepackage{fancyvrb}
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\usepackage{tikz}
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\usepackage{multirow}
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\begin{document}
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@ -40,42 +39,34 @@ L1 cache & 32 kB per core
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All values are reported using base 2 IEC byte units. The cluster has 2 sockets
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and a total of 20 cores (10 per socket). The cache topology diagram reported by
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\texttt{likwid-topology -g} is the following:
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\texttt{likwid-topology -g} is shown in Figure \ref{fig:topo}.
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\pagebreak[4]
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% https://tex.stackexchange.com/a/171818
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\begin{Verbatim}[fontsize=\tiny]
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Socket 0:
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+---------------------------------------------------------------------------------------------------------------+
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 0 | | 1 | | 2 | | 3 | | 4 | | 5 | | 6 | | 7 | | 8 | | 9 | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +-----------------------------------------------------------------------------------------------------------+ |
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| | 25 MB | |
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| +-----------------------------------------------------------------------------------------------------------+ |
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+---------------------------------------------------------------------------------------------------------------+
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Socket 1:
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+---------------------------------------------------------------------------------------------------------------+
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 10 | | 11 | | 12 | | 13 | | 14 | | 15 | | 16 | | 17 | | 18 | | 19 | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +-----------------------------------------------------------------------------------------------------------+ |
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| | 25 MB | |
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| +-----------------------------------------------------------------------------------------------------------+ |
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+---------------------------------------------------------------------------------------------------------------+
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\end{Verbatim}
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\begin{figure}[t]
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\begin{center}
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Socket 0:\vspace{0.3cm}
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\begin{tabular}{|l|l|l|l|l|l|l|l|l|l|}
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\hline 0 & 1 & 2 & 3 & 4 & 5 & 6 & 7 & 8 & 9 \\\hline
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32 kB & 32 kB & 32 kB & 32 kB & 32 kB & 32 kB & 32 kB & 32 kB & 32
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kB & 32 kB \\\hline
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256 kB & 256 kB & 256 kB & 256 kB & 256 kB & 256 kB & 256 kB & 256
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kB & 256 kB & 256 kB \\\hline
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\multicolumn{10}{|c|}{25 MB} \\\hline
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\end{tabular}\vspace{0.8cm}\\
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Socket 1:\vspace{0.3cm}
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\begin{tabular}{|l|l|l|l|l|l|l|l|l|l|}
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\hline 10 & 11 & 12 & 13 & 14 & 15 & 16 & 17 & 18 & 19 \\\hline
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32 kB & 32 kB & 32 kB & 32 kB & 32 kB & 32 kB & 32 kB & 32 kB & 32
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kB & 32 kB \\\hline
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256 kB & 256 kB & 256 kB & 256 kB & 256 kB & 256 kB & 256 kB & 256
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kB & 256 kB & 256 kB \\\hline
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\multicolumn{10}{|c|}{25 MB} \\\hline
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\end{tabular}
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\end{center}
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\caption{Cache topology diagram as outputted by \texttt{likwid-topology -g}.
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Byte sizes all in IEC units.}
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\label{fig:topo}
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\end{figure}
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\subsection{Memory Access Pattern of \texttt{membench.c}}
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@ -221,7 +212,12 @@ implementing the pseudocode, my implementation:
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\end{figure}
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The results of the matrix multiplication benchmark for the naive, blocked, and
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BLAS implementations are shown in Figure \ref{fig:bench}.
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BLAS implementations are shown in Figure \ref{fig:bench}. The blocked
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implementation achieves approximately 50\% more FLOPS than the naive
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implementation thanks to the optimisations in space and temporal cache locality
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described. However, the blocked implementation achives less than a tenth of
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FLOPS compared to Intel MKL BLAS based one due to the microarchitecture
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optimization the latter one is able to exploit.
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\begin{figure}[t]
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\includegraphics[width=\textwidth]{timing.pdf}
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